/*
 * MCP23S17.c
 *
 * Created: 13.01.2012 17:04:29
 *  Author: Alex
 */ 

#include <avr/io.h>
#include <stdio.h>
#include <avr/interrupt.h>
#include <avr/eeprom.h>
#include <avr/delay.h>
#include <string.h>
#include "MCP23S17.h"

void conf_mcp_send(uint8_t addr,uint8_t art,uint8_t pa,uint8_t pb)
{
	cli();
	//uint8_t send_addr;
	//send_addr=addr && 0b111;
	//addr= send_addr<<1;
	MCP_CS_ON();  
	SPI_WRITE(((addr )<<1) | 0x40);
	SPI_WAIT();
	SPI_WRITE(art);
	SPI_WAIT();
	SPI_WRITE(pa);
	SPI_WAIT();
	SPI_WRITE(pb);
	SPI_WAIT();     
	MCP_CS_OFF();
	_delay_us(2);
	sei();
}     

void mcp_send(uint8_t addr,uint8_t pa,uint8_t pb)
{
	cli();
   //uint8_t send_addr;
   //send_addr=addr && 0b111;
   //addr= send_addr<<1;
    MCP_CS_ON();
	//_delay_us(20);      
   SPI_WRITE((addr <<1) | 0x40);
   SPI_WAIT();
   SPI_WRITE(0x12);
   SPI_WAIT();
   SPI_WRITE(pa);
   SPI_WAIT();
   SPI_WRITE(pb);
SPI_WAIT(); 
//_delay_us(20);
   MCP_CS_OFF();
_delay_us(2);   

     }
   
int mcp_rec(uint8_t addr)
    {
  cli();
  uint8_t timeout;
  uint8_t by;
  uint8_t bx;
  MCP_CS_ON();
//_delay_us(20);      
  SPI_WRITE((addr <<1) | 0x41);
  SPI_WAIT();
  SPI_WRITE(0x12);
  SPI_WAIT();
   
  timeout=255;
 
    //wait for response
    do
  {
    SPI_WRITE(DUMMY_WRITE);
    SPI_WAIT();
    by=SPI_DATA_REGISTER;
    timeout--;
    if(timeout==0) break; // no response
  } while(by==DUMMY_WRITE);
  
  do
  {
    SPI_WRITE(DUMMY_WRITE);
    SPI_WAIT();
    bx=SPI_DATA_REGISTER;
    timeout--;
    if(timeout==0) break; // no response
  } while(bx==DUMMY_WRITE);
  MCP_CS_OFF();
_delay_us(2);    
   sei();
  return by | bx<<8; 
   
  }    
   
void mcp_int_on()
{
	cli();
   conf_mcp_send(3,MCP_GPINTEN,0XFF,0XFF);  
   conf_mcp_send(3,MCP_DEFVAL,0X00,0X00);
}
   
void initmcp(uint8_t addr)
{
	cli();
	// SPCR SPI Controlregister
	// SPIE=0; //No SPI Interrupt
	// SPE=1;  //SPI Enable
	// DORD=0; //Send MSB first
	// MSTR=1; //I am the master !
	// CPOL=0; //SCK low if IDLE
	// CPHA=0; //SPI Mode 0
	// SPR1=1; //SPI Clock = f/128 = 125kHz @16MHz Clock
	// SPR0=1; //or f/64 if SPI2X = 1 in SPSR register
	
	MCP_CS_INIT();						// CS
	DDRB |= (1<<PINB7) | (1<<PINB5);	// SCK, MOSI
	DDRB &= ~(1<<PINB6);				// MISO
	SPI_CTRL_REGISTER = (1<<SPE0) | (1<<MSTR0) | (1<<SPR00);

	// SPSR SPI Statusregister
	// SPI2X=0; // No double speed
	_delay_ms(1);
	/*Teste*******/
	//conf_mcp_send(addr,MCP_IOCON,0b00000000,0b00000000);
	conf_mcp_send(addr,MCP_GPPU,0XF8,0X87);
	/******************************/
	
	//conf_mcp_send(1,MCP_IODIR,0X00,0X00);
   //
	//conf_mcp_send(2,MCP_IOCON,0x40,0x40);
	//conf_mcp_send(2,MCP_IODIR,0X00,0X00);   
   //
	//conf_mcp_send(0,MCP_IOCON,0b01000000,0b01000000);
	//conf_mcp_send(3,MCP_IODIR,0XFF,0XFF);   
	//conf_mcp_send(3,MCP_IPOL,0XFF,0XFF);  
	//conf_mcp_send(0,MCP_GPPU,0XFF,0X00);
   
	/*EIMSK = (1<<INT2);
	EIFR = (1<<INTF2);
	EICRA |=(0<<ISC20);
	EICRA |=(0<<ISC21);



/* Move interrupts to Boot Flash section */
}